This invention relates to an IC card and the method of manufacturing the same.
In the Japanese Patent application 59-196,206 the present inventors proposed a method of manufacturing an IC card which comprises the steps of embedding a semiconductor IC chip in an insulating core sheet, forming a conductive layer pattern on the main surface of the core sheet, and electrically connecting an electrode deposited on the IC chip to the conductive layer pattern. The proposed IC card-manufacturing method offered the advantage that since the exposed electrode of an IC chip embedded in a core sheet could be directly connected to the conductive layer pattern formed on the main surface of the core sheet, it became possible to provide a thin IC card. In contrast, the conventional IC card-manufacturing method had the drawback in that when the electrode deposited on the IC chip and the conductive layer pattern were connected together by a bonding wire, the so-called loop height (a portion inevitably raised in height due to the bonding wire connection) caused the thickness of the IC card to be increased.
In addition, the previously proposed IC card was further accompanied by the following drawback. Since the surface of the IC chip on which an electrode is formed is made flush with the main surface of the core sheet, part of the conductive layer pattern connected to the electrode contacts part of the surface of the IC chip. The surface of the IC chip is coated with a passivation layer prepared from phosphor silicate glass. Unless, therefore, the passivation layer partly falls off, the above-mentioned contact presents no difficulties. If, however, the passivation layer falls off at the above-mentioned portion, this can cause an electric short circuit between the conductive layer pattern and the IC chip.